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PIC16F777-I/PT 参数 Datasheet PDF下载

PIC16F777-I/PT图片预览
型号: PIC16F777-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚, 8位CMOS闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 276 页 / 4898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X7  
The stack operates as a circular buffer. This means that  
after the stack has been PUSHed eight times, the ninth  
push overwrites the value that was stored from the first  
push. The tenth push overwrites the second push (and  
so on).  
2.3  
PCL and PCLATH  
The Program Counter (PC) is 13 bits wide. The low  
byte comes from the PCL register which is a readable  
and writable register. The upper bits (PC<12:8>) are  
not readable but are indirectly writable through the  
PCLATH register. On any Reset, the upper bits of the  
PC will be cleared. Figure 2-4 shows the two situations  
for the loading of the PC. The upper example in the  
figure shows how the PC is loaded on a write to PCL  
(PCLATH<4:0> PCH). The lower example in the  
figure shows how the PC is loaded during a CALL or  
GOTOinstruction (PCLATH<4:3> PCH).  
Note 1: There are no Status bits to indicate stack  
overflow or stack underflow conditions.  
2: There are no instructions/mnemonics  
called PUSH or POP. These are actions  
that occur from the execution of the  
CALL, RETURN, RETLW and RETFIE  
instructions or the vectoring to an  
interrupt address.  
FIGURE 2-4:  
LOADING OF PC IN  
DIFFERENT SITUATIONS  
2.4  
Program Memory Paging  
PIC16F7X7 devices are capable of addressing a con-  
tinuous 8K word block of program memory. The CALL  
and GOTOinstructions provide only 11 bits of address to  
allow branching within any 2K program memory page.  
When doing a CALL or GOTO instruction, the upper  
2 bits of the address are provided by PCLATH<4:3>.  
When doing a CALLor GOTOinstruction, the user must  
ensure that the page select bits are programmed so  
that the desired program memory page is addressed. If  
a return from a CALL instruction (or interrupt) is  
executed, the entire 13-bit PC is POPed off the stack.  
Therefore, manipulation of the PCLATH<4:3> bits is  
not required for the RETURNinstructions (which POPs  
the address from the stack).  
PCH  
PCL  
12  
8
7
0
Instruction with  
PCL as  
Destination  
PC  
8
PCLATH<4:0>  
PCLATH  
5
ALU  
PCH  
12 11 10  
PC  
PCL  
8
7
0
GOTO,CALL  
PCLATH<4:3>  
PCLATH  
11  
2
Opcode <10:0>  
Note:  
The contents of the PCLATH are  
unchanged after a RETURN or RETFIE  
instruction is executed. The user must set  
up the PCLATH for any subsequent CALLs  
or GOTOs.  
2.3.1  
COMPUTED GOTO  
A computed GOTOis accomplished by adding an offset  
to the program counter (ADDWF PCL). When doing a  
table read using a computed GOTO method, care  
should be exercised if the table location crosses a PCL  
memory boundary (each 256-byte block). Refer to the  
Application Note, AN556 “Implementing a Table Read”  
(DS00556).  
Example 2-1 shows the calling of a subroutine in  
page 1 of the program memory. This example assumes  
that PCLATH is saved and restored by the Interrupt  
Service Routine (if interrupts are used).  
EXAMPLE 2-1:  
CALL OF A SUBROUTINE  
IN PAGE 1 FROM PAGE 0  
2.3.2  
STACK  
ORG  
BCF  
BSF  
0x500  
PCLATH, 4  
PCLATH, 3 ;Select page 1  
;(800h-FFFh)  
The PIC16F7X7 family has an 8-level deep x 13-bit  
wide hardware stack. The stack space is not part of  
either program or data space and the stack pointer is  
not readable or writable. The PC is PUSHed onto the  
stack when a CALL instruction is executed or an  
interrupt causes a branch. The stack is POPed in the  
event of a RETURN, RETLWor a RETFIE instruction  
execution. PCLATH is not affected by a PUSH or POP  
operation.  
CALL SUB1_P1  
:
:
ORG  
;Call subroutine in  
;page 1 (800h-FFFh)  
0x900  
;page 1 (800h-FFFh)  
SUB1_P1  
RETURN  
:
:
:
;called subroutine  
;page 1 (800h-FFFh)  
;return to Call  
;subroutine in page 0  
;(000h-7FFh)  
2004 Microchip Technology Inc.  
DS30498C-page 29  
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