PIC16F7X7
13.7 Comparator Operation
During Sleep
13.9 Analog Input Connection
Considerations
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional if enabled. This interrupt will
wake-up the device from Sleep mode when enabled.
While the comparator is powered up, higher Sleep
currents than shown in the power-down current
specification will occur. Each operational comparator
will consume additional current as shown in the com-
parator specifications. To minimize power consumption
while in Sleep mode, turn off the comparators
(CM<2:0> = 111) before entering Sleep. If the device
wakes up from Sleep, the contents of the CMCON
register are not affected.
A simplified circuit for an analog input is shown in
Figure 13-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input, therefore, must be between
VSS and VDD. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 kΩ is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
13.8 Effects of a Reset
A device Reset forces the CMCON register to its Reset
state, causing the comparator module to be in the
Comparator Off mode, CM<2:0> = 111. This ensures
compatibility to the PIC16F87X devices.
FIGURE 13-4:
ANALOG INPUT MODEL
VDD
VT = 0.6V
RIC
RS < 10K
AIN
ILEAKAGE
±500 nA
CPIN
5 pF
VA
VT = 0.6V
VSS
Legend: CPIN
=
Input Capacitance
VT
= Threshold Voltage
ILEAKAGE = Leakage Current at the pin due to various junctions
RIC
RS
VA
=
=
=
Interconnect Resistance
Source Impedance
Analog Voltage
TABLE 13-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Value on
all other
Resets
Value on
POR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9Ch
9Dh
CMCON
C2OUT C1OUT C2INV C1INV
CIS
CM2
CM1
CM0
CVR0
RBIF
0000 0111 0000 0111
000- 0000 000- 0000
0000 000x 0000 000u
CVRCON CVREN CVROE CVRR
—
CVR3
CVR2
CVR1
0Bh, 8Bh, INTCON
10Bh,18Bh
GIE
PEIE
TMR0IE INT0IE RBIE TMR0IF INT0IF
0Dh
PIR2
OSFIF
OSFIE
RA7
CMIF
CMIE
RA6
LVDIF
LVDIE
RA5
—
—
BCLIF
BCLIE
RA3
—
—
CCP3IF CCP2IF 000- 0-00 000- 0-00
CCP3IE CCP2IE 000- 0-00 000- 0-00
8Dh
PIE2
05h
PORTA
TRISA
RA4
RA2
RA1
RA0
xx0x 0000 uu0u 0000
1111 1111 1111 1111
85h
PORTA Data Direction Register
Legend:
x= unknown, u= unchanged, — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
2004 Microchip Technology Inc.
DS30498C-page 165
MICROCHIP [ MICROCHIP ]
