PIC16F7X7
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the FOSC/(16(X + 1)) equation can reduce the
baud rate error in some cases.
11.1 AUSART Baud Rate Generator
(BRG)
The BRG supports both the Asynchronous and
Synchronous modes of the AUSART. It is a dedicated
8-bit Baud Rate Generator. The SPBRG register
controls the period of a free running 8-bit timer. In
Asynchronous mode, bit BRGH (TXSTA<2>) also
controls the baud rate. In Synchronous mode, bit
BRGH is ignored. Table 11-1 shows the formula for
computation of the baud rate for different AUSART
modes which only apply in Master mode (internal
clock).
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
11.1.1
SAMPLING
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
Given the desired baud rate and FOSC, the nearest
integer value for the SPBRG register can be calculated
using the formula in Table 11-1. From this, the error in
baud rate can be determined.
TABLE 11-1: BAUD RATE FORMULA
SYNC
BRGH = 0 (Low Speed)
BRGH = 1 (High Speed)
0
1
(Asynchronous) Baud Rate = FOSC/(64(X + 1))
(Synchronous) Baud Rate = FOSC/(4(X + 1))
Baud Rate = FOSC/(16(X + 1))
N/A
Legend: X = value in SPBRG (0 to 255).
TABLE 11-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Value on
all other
Resets
Value on:
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
98h
TXSTA
RCSTA
SPBRG
CSRC
SPEN
TX9
RX9
TXEN
SYNC
—
BRGH
FERR
TRMT TX9D 0000 -010 0000 -010
OERR RX9D 0000 000x 0000 000x
0000 0000 0000 0000
18h
SREN CREN
ADDEN
99h
Baud Rate Generator Register
Legend:
x = unknown, — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
2004 Microchip Technology Inc.
DS30498C-page 135
MICROCHIP [ MICROCHIP ]
