PIC16F87X
Connection Considerations for I2C
Bus
example, with a supply voltage of VDD = 5V+10% and
VOL max = 0.4V at 3 mA, Rp min = (5.5-0.4)/0.003 =
1.7 kΩ. VDD as a function of Rp is shown in Figure 9-27.
The desired noise margin of 0.1VDD for the low level
limits the maximum value of Rs. Series resistors are
optional and used to improve ESD susceptibility.
9.3
For standard-mode I2C bus devices, the values of
resistors Rp and Rs in Figure 9-27 depend on the fol-
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
(input current + leakage current).
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of Rp due to the specified rise time
(Figure 9-27).
The supply voltage limits the minimum value of resistor
Rp due to the specified minimum sink current of 3 mA
at VOL max = 0.4V for the specified output stages. For
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I2C mode (master or slave).
FIGURE 9-27: SAMPLE DEVICE CONFIGURATION FOR I2C BUS
VDD + 10%
DEVICE
Rp
Rp
Rs
Rs
SDA
SCL
C =10 - 400 pF
b
2
Note:
I C devices with input levels related to VDD must have one common supply
line to which the pull-up resistor is also connected.
1999 Microchip Technology Inc.
DS30292A-page 93
MICROCHIP [ MICROCHIP ]
