PIC16C71X
4.2.2.4
PIE1 REGISTER
Note: Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
Applicable Devices 710 71 711 715
This register contains the individual enable bits for the
Peripheral interrupts.
FIGURE 4-10: PIE1 REGISTER (ADDRESS 8Ch)
U-0
—
R/W-0
ADIE
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R
= Readable bit
W = Writable bit
bit7
bit0
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit 7:
Unimplemented: Read as '0'
bit 6:
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
bit 5-0: Unimplemented: Read as '0'
DS30272A-page 20
1997 Microchip Technology Inc.