PIC16F62X
Steps to follow when setting up an Asynchronous
Reception:
6. Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE was set.
1. Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 12.1).
7. Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
2. Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
8. Read the 8-bit received data by reading the
RCREG register.
3. If interrupts are desired, then set enable bit
RCIE.
9. If any error occurred, clear the error by clearing
enable bit CREN.
4. If 9-bit reception is desired, then set bit RX9.
5. Enable the reception by setting bit CREN.
TABLE 12-7: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Value on
all other
Resets
Value on
POR
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Ch
18h
1Ah
8Ch
98h
99h
PIR1
EEIF
CMIF
RCIF
TXIF
—
CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000
RCSTA
SPEN
RX9
SREN CREN ADEN FERR
OERR
RX9D
0000 -00x 0000 -00x
0000 0000 0000 0000
RCREG USART Receive Register
PIE1
EEIE
CMIE
TX9
RCIE
TXIE
—
—
CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000
TXSTA
CSRC
TXEN
SYNC
BRGH
TRMT
TX9D
0000 -010 0000 -010
0000 0000 0000 0000
SPBRG Baud Rate Generator Register
Legend: x= unknown, -= unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
DS40300B-page 82
Preliminary
1999 Microchip Technology Inc.