PIC16F62X
as a half duplex synchronous system that can commu-
nicate with peripheral devices such as A/D or D/A inte-
grated circuits, Serial EEPROMs etc.
12.0 UNIVERSAL SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
The USART can be configured in the following modes:
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial Com-
munications Interface or SCI). The USART can be con-
figured as a full duplex asynchronous system that can
communicate with peripheral devices such as CRT ter-
minals and personal computers, or it can be configured
• Asynchronous (full duplex)
• Synchronous - Master (half duplex)
• Synchronous - Slave (half duplex)
Bit SPEN (RCSTA<7>), and bits TRISB<2:1>, have
to be set in order to configure pins RB2/TX/CK and
RB1/RX/DT as the Universal Synchronous Asyn-
chronous Receiver Transmitter.
REGISTER 12-1: TXSTA: TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS 98h)
R/W-0
CSRC
R/W-0
TX9
R/W-0
TXEN
R/W-0
SYNC
U-0
—
R/W-0
BRGH
R-1
R/W-0
TX9D
TRMT
R = Readable bit
W = Writable bit
bit7
bit0
U = Unimplemented bit,
read as ’0’
-n = Value at POR reset
bit 7:
CSRC: Clock Source Select bit
Asynchronous mode
Don’t care
Synchronous mode
1= Master mode (Clock generated internally from BRG)
0= Slave mode (Clock from external source)
bit 6:
TX9: 9-bit Transmit Enable bit
1= Selects 9-bit transmission
0= Selects 8-bit transmission
bit 5:
TXEN: Transmit Enable bit
1= Transmit enabled
0= Transmit disabled
Note: SREN/CREN overrides TXEN in SYNC mode.
bit 4:
SYNC: USART Mode Select bit
1= Synchronous mode
0= Asynchronous mode
bit 3:
bit 2:
Unimplemented: Read as '0'
BRGH: High Baud Rate Select bit
Asynchronous mode
1= High speed
0= Low speed
Synchronous mode
Unused in this mode
bit 1:
bit 0:
TRMT: Transmit Shift Register Status bit
1= TSR empty
0= TSR full
TX9D: 9th bit of transmit data. Can be parity bit.
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 71
MICROCHIP [ MICROCHIP ]
