PIC16F62X
FIGURE 7-2: TIMER1 INCREMENTING EDGE
T1CKI
(Default high)
T1CKI
(Default low)
Note: Arrows indicate counter increments.
7.3
Timer1 Operation in Asynchronous
Counter Mode
EXAMPLE 7-1: READING A 16-BIT
FREE-RUNNING TIMER
If control bit T1SYNC (T1CON<2>) is set, the external
clock input is not synchronized. The timer continues to
increment asynchronous to the internal phase clocks.
The timer will continue to run during SLEEP and can
generate an interrupt on overflow which will wake-up
the processor. However, special precautions in soft-
ware are needed to read/write the timer (Section 7.3.2).
; All interrupts are disabled
MOVF
MOVWF TMPH
MOVF TMR1L, W ;Read low byte
MOVWF TMPL
MOVF TMR1H, W ;Read high byte
SUBWF TMPH,
TMR1H, W ;Read high byte
;
;
W
;Sub 1st read
; with 2nd read
BTFSC STATUS,Z ;Is result = 0
GOTO CONTINUE ;Good 16-bit read
In asynchronous counter mode, Timer1 can not be
used as a time-base for capture or compare operations.
;
7.3.1
EXTERNAL CLOCK INPUT TIMING WITH
UNSYNCHRONIZED CLOCK
; TMR1L may have rolled over between the read
; of the high and low bytes. Reading the high
; and low bytes now will read a good value.
;
If control bit T1SYNC is set, the timer will increment
completely asynchronously. The input clock must meet
certain minimum high time and low time requirements.
Refer to the appropriate Electrical Specifications Sec-
tion, timing parameters 45, 46, and 47.
MOVF
MOVWF TMPH
MOVF TMR1L, W ;Read low byte
MOVWF TMPL
; Re-enable the Interrupt (if required)
CONTINUE ;Continue with your code
TMR1H, W ;Read high byte
;
;
7.3.2
READING AND WRITING TIMER1 IN
ASYNCHRONOUS COUNTER MODE
7.4
Timer1 Oscillator
Reading TMR1H or TMR1L while the timer is running,
from an external asynchronous clock, will guarantee a
valid read (taken care of in hardware). However, the
user should keep in mind that reading the 16-bit timer
in two 8-bit values itself poses certain problems since
the timer may overflow between the reads.
A crystal oscillator circuit is built in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). The oscilla-
tor is a low power oscillator rated up to 200 kHz. It will
continue to run during SLEEP. It is primarily intended
for a 32 kHz crystal. Table 7-1 shows the capacitor
selection for the Timer1 oscillator.
For writes, it is recommended that the user simply stop
the timer and write the desired values. A write conten-
tion may occur by writing to the timer registers while the
register is incrementing. This may produce an unpre-
dictable value in the timer register.
The Timer1 oscillator is identical to the LP oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
Reading the 16-bit value requires some care.
Example 7-1 is an example routine to read the 16-bit
timer value. This is useful if the timer cannot be
stopped.
TABLE 7-1:
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
Osc Type
Freq
C1
C2
LP
32 kHz
100 kHz
200 kHz
33 pF
15 pF
15 pF
33 pF
15 pF
15 pF
These values are for design guidance only.
DS40300B-page 52
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
