PIC16F62X
SWAPF
Syntax:
Swap Nibbles in f
XORLW
Exclusive OR Literal with W
[ label ] SWAPF f,d
Syntax:
[ label ] XORLW k
0 ≤ k ≤ 255
Operands:
0 ≤ f ≤ 127
Operands:
Operation:
Status Affected:
Encoding:
d
[0,1]
(W) .XOR. k → (W)
Z
Operation:
(f<3:0>) → (dest<7:4>),
(f<7:4>) → (dest<3:0>)
11
1010 kkkk kkkk
Status Affected:
Encoding:
None
The contents of the W register are
XOR’ed with the eight bit literal 'k'.
The result is placed in the
W register.
Description:
00
1110
dfff
ffff
The upper and lower nibbles of
Description:
register ’f’ are exchanged. If ’d’ is 0
the result is placed in W register. If ’d’
is 1 the result is placed in register ’f’.
Words:
1
Cycles:
Example:
1
Words:
Cycles:
Example
1
1
XORLW 0xAF
Before Instruction
SWAPF REG,
0
W
=
0xB5
0x1A
Before Instruction
REG1
After Instruction
=
0xA5
W
=
After Instruction
REG1
W
=
=
0xA5
0x5A
TRIS
Load TRIS Register
XORWF
Syntax:
Exclusive OR W with f
[ label ] XORWF f,d
0 ≤ f ≤ 127
Syntax:
[ label ] TRIS
f
Operands:
Operation:
5 ≤ f ≤ 7
Operands:
d
[0,1]
(W) → TRIS register f;
Status Affected: None
Operation:
(W) .XOR. (f) → (dest)
00
Encoding:
0000 0110
0fff
Status Affected:
Encoding:
Z
The instruction is supported for code
compatibility with the PIC16C5X
products. Since TRIS registers are
readable and writable, the user can
directly address them.
Description:
00
0110
dfff
ffff
Exclusive OR the contents of the
W register with register 'f'. If 'd' is 0 the
result is stored in the W register. If 'd'
is 1 the result is stored back in register
'f'.
Description:
Words:
Cycles:
Example
1
1
Words:
Cycles:
Example
1
1
To maintain upward compatibility
REG
1
XORWF
®
with future PICmicro products, do
Before Instruction
not use this instruction.
REG
W
=
=
0xAF
0xB5
After Instruction
REG
W
=
=
0x1A
0xB5
DS40300B-page 124
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
