PIC16F62X
Timer0
TIMER0....................................................................... 45
USART
Asynchronous Mode................................................... 78
Asynchronous Receiver.............................................. 80
Asynchronous Reception............................................ 82
Asynchronous Transmission ...................................... 79
Asynchronous Transmitter.......................................... 78
Baud Rate Generator (BRG) ...................................... 73
Sampling..................................................................... 76
Synchronous Master Mode......................................... 84
Synchronous Master Reception ................................. 86
Synchronous Master Transmission ............................ 84
Synchronous Slave Mode........................................... 88
Synchronous Slave Reception ................................... 88
Synchronous Slave Transmit...................................... 88
Transmit Block Diagram ............................................. 78
TIMER0 (TMR0) Interrupt ........................................... 45
TIMER0 (TMR0) Module............................................. 45
TMR0 with External Clock........................................... 47
Timer1
Special Event Trigger (CCP)....................................... 65
Switching Prescaler Assignment................................. 49
Timer2
PR2 Register............................................................... 66
TMR2 to PR2 Match Interrupt..................................... 66
Timers
Timer1
Asynchronous Counter Mode ............................. 52
Block Diagram .................................................... 51
Capacitor Selection............................................. 52
External Clock Input............................................ 51
External Clock Input Timing................................ 52
Operation in Timer Mode .................................... 51
Oscillator............................................................. 52
Prescaler....................................................... 51, 53
Resetting of Timer1 Registers ............................ 53
Resetting Timer1 using a CCP Trigger Output ... 53
Synchronized Counter Mode .............................. 51
T1CON................................................................ 50
TMR1H ............................................................... 52
TMR1L ................................................................ 52
V
Voltage Reference Module ................................................. 69
VRCON Register ................................................................ 69
W
Watchdog Timer (WDT).................................................... 109
WRITE ................................................................................ 93
WRITING ............................................................................ 93
WWW, On-Line Support ....................................................... 3
X
XORLW Instruction........................................................... 124
XORWF Instruction........................................................... 124
Timer2
Block Diagram .................................................... 54
Module ................................................................ 54
Postscaler ........................................................... 54
Prescaler............................................................. 54
T2CON................................................................ 55
Timing Diagrams
Timer0....................................................................... 142
Timer1....................................................................... 142
USART Asynchronous Master Transmission.............. 79
USART RX Pin Sampling...................................... 76, 77
USART Synchronous Reception................................. 87
USART Synchronous Transmission ........................... 85
USART, Asynchronous Reception.............................. 81
Timing Diagrams and Specifications................................. 139
TMR0 Interrupt.................................................................. 108
TMR1CS bit ........................................................................ 50
TMR1ON bit ........................................................................ 50
TMR2ON bit ........................................................................ 55
TOUTPS0 bit....................................................................... 55
TOUTPS1 bit....................................................................... 55
TOUTPS2 bit....................................................................... 55
TOUTPS3 bit....................................................................... 55
TRIS Instruction ................................................................ 124
TRISA ................................................................................. 27
TRISB ................................................................................. 34
TXSTA Register .................................................................. 71
U
Universal Synchronous Asynchronous Receiver
Transmitter (USART) .......................................................... 71
Asynchronous Receiver
Setting Up Reception.......................................... 83
Timing Diagram .................................................. 81
Asynchronous Receiver Mode
Block Diagram .................................................... 83
Section................................................................ 83
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 153