PIC16C5X
The Electrical Specifications sections show RC
frequency variation from part to part due to normal
process variation.
7.3
Reset
PIC16C5X devices may be reset in one of the
following ways:
Also, see the Electrical Specifications sections for
variation of oscillator frequency due to VDD for given
Rext/Cext values as well as frequency variation due to
operating temperature for given R, C, and VDD values.
• Power-On Reset (POR)
• MCLR reset (normal operation)
• MCLR wake-up reset (from SLEEP)
• WDT reset (normal operation)
• WDT wake-up reset (from SLEEP)
The oscillator frequency, divided by 4, is available on
the OSC2/CLKOUT pin, and can be used for test
purposes or to synchronize other logic.
Table 7-3 shows these reset conditions for the PCL
and STATUS registers.
FIGURE 7-7: RC OSCILLATOR MODE
Some registers are not affected in any reset condition.
Their status is unknown on POR and unchanged in
any other reset. Most other registers are reset to a
“reset state” on Power-On Reset (POR), MCLR or
WDT reset. A MCLR or WDT wake-up from SLEEP
also results in a device reset, and not a continuation of
operation before SLEEP.
VDD
Rext
Internal
clock
OSC1
N
Cext
VSS
PIC16C5X
The TO and PD bits (STATUS <4:3>) are set or
cleared depending on the different reset conditions
(Section 7.7). These bits may be used to determine
the nature of the reset.
Fosc/4
OSC2/CLKOUT
Table 7-4 lists a full description of reset states of all
registers. Figure 7-8 shows a simplified block diagram
of the on-chip reset circuit.
Note: If you change from this device to
another device, please verify oscillator
characteristics in your application.
1998 Microchip Technology Inc.
Preliminary
DS30453B-page 35
MICROCHIP [ MICROCHIP ]
