PIC16C5X
4.5
Program Counter
FIGURE 4-10: LOADING OF PC
BRANCH INSTRUCTIONS -
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
PIC16C52, PIC16C54s,
PIC16CR54s, PIC16C55s
GOTO Instruction
8
7
0
For a GOTOinstruction, bits 8:0 of the PC are provided
by the GOTOinstruction word. The PC Latch (PCL) is
mapped to PC<7:0> (Figure 4-10 and Figure 4-11).
PCL
PC
Instruction Word
For the PIC16C56s, PIC16CR56s, PIC16C57s,
PIC16CR57s, PIC16C58s and PIC16CR58s, a page
number must be supplied as well. Bit5 and bit6 of the
STATUS register provide page information to bit9 and
bit10 of the PC (Figure 4-11 and Figure 4-12).
CALL or Modify PCL Instruction
8
7
0
PCL
PC
For a CALLinstruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are
provided by the instruction word. However, PC<8>
does not come from the instruction word, but is always
cleared (Figure 4-10 and Figure 4-11).
Reset to '0'
Instruction Word
FIGURE 4-11: LOADING OF PC
BRANCH INSTRUCTIONS -
PIC16C56s/PIC16CR56s
Instructions where the PCL is the destination, or
Modify PCL instructions, include MOVWF PC, ADDWF
PC,and BSF PC,5.
GOTO Instruction
For the PIC16C56s, PIC16CR56s, PIC16C57s,
PIC16CR57s, PIC16C58s and PIC16CR58s, a page
number again must be supplied. Bit5 and bit6 of the
STATUS register provide page information to bit9 and
bit10 of the PC (Figure 4-11 and Figure 4-12).
10
9
8
7
0
PC
PCL
Instruction Word
Note: Because PC<8> is cleared in the CALL
instruction, or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
2
PA1:PA0
7
0
STATUS
CALL or Modify PCL Instruction
10
9
8
7
0
PC
PCL
Instruction Word
Reset to ‘0’
PA1:PA0
2
7
0
STATUS
DS30453B-page 22
Preliminary
1998 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
