PIC16C54B/C54C/CR54B/CR54C/C55A/C56A/CR56A/C57C/CR57C/C58B/CR58B
FIGURE 19-4: RESET, WATCHDOG TIMER, AND
DEVICE RESET TIMER TIMING - PIC16C5X, PIC16CR5X
VDD
MCLR
30
Internal
POR
32
32
32
DRT
Time-out
Internal
RESET
Watchdog
Timer
RESET
31
34
34
I/O pin
(Note 1)
Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.
TABLE 19-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC16C5X, PIC16CR5X
AC Characteristics Standard Operating Conditions (unless otherwise specified)
Operating Temperature
0°C ≤ TA ≤ +70°C (commercial)
–40°C ≤ TA ≤ +85°C (industrial)
–40°C ≤ TA ≤ +125°C (extended)
Operating Voltage VDD range is described in Section 19.1, Section 19.2 and Section 19.3.
Parameter
No.
(1)
Sym Characteristic
Min Typ
Max Units
Conditions
30
31
TmcL MCLR Pulse Width (low)
1000*
9.0*
—
—
ns VDD = 5.0V
Twdt Watchdog Timer Time-out Period
(No Prescaler)
18*
30*
ms VDD = 5.0V (Commercial)
32
34
TDRT Device Reset Timer Period
9.0*
18*
30*
ms VDD = 5.0V (Commercial)
ns
TioZ I/O Hi-impedance from MCLR Low 100* 300* 1000*
*
These parameters are characterized but not tested.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
1998 Microchip Technology Inc.
Preliminary
DS30453B-page 181
MICROCHIP [ MICROCHIP ]
