PIC16C5X
PIC16C54A
FIGURE 14-4: RESET, WATCHDOG TIMER, AND
DEVICE RESET TIMER TIMING - PIC16C54A
VDD
MCLR
30
Internal
POR
32
32
32
DRT
Time-out
Internal
RESET
Watchdog
Timer
RESET
31
34
34
I/O pin
(Note 1)
Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.
TABLE 14-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC16C54A
AC Characteristics Standard Operating Conditions (unless otherwise specified)
Operating Temperature
0°C ≤ TA ≤ +70°C (commercial)
–40°C ≤ TA ≤ +85°C (industrial)
–20°C ≤ TA ≤ +85°C (industrial - PIC16LV54A-02I)
–40°C ≤ TA ≤ +125°C (extended)
Operating Voltage VDD range is described in Section 14.1, Section 14.2 and Section 14.3.
Parameter
No.
(1)
Sym Characteristic
Min Typ
Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
100*
1µs
—
—
—
—
ns VDD = 5.0V
—
VDD = 5.0V (PIC16LV54A only)
31
Twdt Watchdog Timer Time-out
Period (No Prescaler)
9.0*
18*
30*
ms VDD = 5.0V (Commercial)
32
34
TDRT Device Reset Timer Period
9.0*
18*
30*
ms VDD = 5.0V (Commercial)
ns
TioZ I/O Hi-impedance from MCLR
Low
—
—
—
—
100*
1µs
—
(PIC16LV54A only)
*
These parameters are characterized but not tested.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
DS30453B-page 114
Preliminary
1998 Microchip Technology Inc.