PIC16F870/871
TABLE 11-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
ADCON1
870 871
870 871
870 871
870 871
870 871
870 871
870 871
0--- 0000
0--- 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
x--- x000
---- ----
0--- 0000
0--- 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
u--- u000
---- ----
u--- uuuu
u--- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
u--- uuuu
---- ----
EEDATA
EEADR
EEDATH
EEADRH
EECON1
EECON2
Legend: u = unchanged,
x = unknown, -= unimplemented bit, read as ’0’, q= value depends
on condition, r= reserved maintain clear.
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the inter-
rupt vector (0004h).
3: See Table 11-5 for reset value for specific condition.
FIGURE 11-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD)
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
TOST
OST TIME-OUT
INTERNAL RESET
FIGURE 11-6: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 1
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
OST TIME-OUT
TOST
INTERNAL RESET
1999 Microchip Technology Inc.
Preliminary
DS30569A-page 97
MICROCHIP [ MICROCHIP ]
