PIC16F7X
FIGURE 1-2:
PIC16F74 AND PIC16F77 BLOCK DIAGRAM
13
8
PORTA
Data Bus
RAM
Program Counter
RA0/AN0
RA1/AN1
RA2/AN2
FLASH
Program
Memory
RA3/AN3/VREF
RA4/T0CKI
RA5/AN4/SS
8 Level Stack
(13-bit)
File
Registers
Program
Bus
14
RAM Addr(1)
PORTB
9
RB0/INT
RB1
RB2
RB3/PGM
RB4
Addr MUX
Instruction reg
Indirect
Addr
7
Direct Addr
8
RB5
FSR reg
RB6/PGC
RB7/PGD
STATUS reg
8
PORTC
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
3
MUX
Power-up
Timer
Oscillator
Start-up Timer
Instruction
Decode &
Control
ALU
RC6/TX/CK
RC7/RX/DT
Power-on
Reset
8
PORTD
Timing
Generation
Watchdog
Timer
W reg
RD0/PSP0
RD1/PSP1
RD2/PSP2
OSC1/CLKIN
OSC2/CLKOUT
Brown-out
Reset
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
MCLR VDD, VSS
PORTE
RE0/AN5/RD
RE1/AN6/WR
RE2/AN7/CS
Timer0
CCP1
Timer1
CCP2
Timer2
8-bit A/D
Synchronous
Serial Port
USART
Parallel Slave Port
Device
Program FLASH
Data Memory
192 Bytes
PIC16F74
PIC16F77
4K
8K
368 Bytes
Note 1: Higher order bits are from the STATUS register.
2002 Microchip Technology Inc.
DS30325B-page 7