PIC16F7X
FIGURE 15-10:
PARALLEL SLAVE PORT TIMING (PIC16F74/77 DEVICES ONLY)
RE2/CS
RE0/RD
RE1/WR
65
RD7:RD0
62
64
63
Note: Refer to Figure 15-3 for load conditions.
TABLE 15-6: PARALLEL SLAVE PORT REQUIREMENTS (PIC16F74/77 DEVICES ONLY)
Parameter
Symbol
Characteristic
Min Typ† Max Units
Conditions
No.
62
TdtV2wrH Data in valid before WR↑ or CS↑ (setup time)
20
25
—
—
—
—
ns
ns Extended range
only
63*
64
TwrH2dtI WR↑ or CS↑ to data in invalid
Standard(F)
20
—
—
—
—
ns
ns
(hold time)
Extended(LF) 35
TrdL2dtV RD↓ and CS↓ to data out valid
TrdH2dtI RD↑ or CS↓ to data out invalid
—
—
—
—
80
90
ns
ns Extended range
only
65
10
—
30
ns
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
2002 Microchip Technology Inc.
DS30325B-page 131
MICROCHIP [ MICROCHIP ]
