PIC16C71X
FIGURE 5-4: BLOCK DIAGRAM OF
RB7:RB4 PINS
FIGURE 5-5: BLOCK DIAGRAM OF
RB7:RB4 PINS
(PIC16C71)
(PIC16C710/711/715)
VDD
VDD
RBPU(2)
RBPU(2)
weak
weak
P
P
pull-up
pull-up
Data Latch
Data Latch
Data bus
WR Port
Data bus
WR Port
D
Q
D
Q
I/O
pin(1)
I/O
pin(1)
CK
TRIS Latch
CK
TRIS Latch
D
Q
D
Q
WR TRIS
WR TRIS
TTL
Input
Buffer
TTL
Input
Buffer
CK
CK
ST
Buffer
ST
Buffer
RD TRIS
RD Port
RD TRIS
RD Port
Latch
Latch
Q
D
Q
Q
D
EN
EN
Q1
Set RBIF
Set RBIF
From other
RB7:RB4 pins
Q
D
D
From other
RB7:RB4 pins
RD Port
Q3
EN
EN
RD Port
RB7:RB6 in serial programming mode
RB7:RB6 in serial programming mode
Note 1: I/O pins have diode protection to VDD and VSS.
2: TRISB = ’1’ enables weak pull-up if
RBPU = ’0’ (OPTION<7>).
Note 1: I/O pins have diode protection to VDD and VSS.
2: TRISB = ’1’ enables weak pull-up if
RBPU = ’0’ (OPTION<7>).
TABLE 5-3:
PORTB FUNCTIONS
Name
Bit#
Buffer
Function
(1)
RB0/INT
bit0
TTL/ST
Input/output pin or external interrupt input. Internal software
programmable weak pull-up.
RB1
RB2
RB3
RB4
bit1
bit2
bit3
bit4
TTL
TTL
TTL
TTL
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
RB5
RB6
RB7
bit5
bit6
bit7
TTL
TTL/ST
TTL/ST
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
(2)
(2)
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming clock.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
DS30272A-page 28
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
