PIC16C63A/65B/73B/74B
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Set
[label] BTFSS f,b
0
≤
f
≤
127
0
≤
b<7
skip if (f<b>) = 1
None
If bit ’b’ in register ’f’ is ’0’, the next
instruction is executed.
If bit ’b’ is ’1’, then the next instruction
is discarded and a
NOP
is executed
instead making this a 2T
CY
instruction.
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear f
[label] CLRF
0
≤
f
≤
127
00h
→
(f)
1
→
Z
Z
The contents of register ’f’ are cleared
and the Z bit is set.
f
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test, Skip if Clear
[label] BTFSC f,b
0
≤
f
≤
127
0
≤
b
≤
7
skip if (f<b>) = 0
None
If bit ’b’ in register ’f’ is ’1’, the next
instruction is executed.
If bit ’b’, in register ’f’, is ’0’, the next
instruction is discarded, and a
NOP
is
executed instead, making this a 2 T
CY
instruction.
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[
label
] CLRW
None
00h
→
(W)
1
→
Z
Z
W register is cleared. Zero bit (Z) is
set.
CALL
Syntax:
Operands:
Operation:
Call Subroutine
[
label
] CALL k
0
≤
k
≤
2047
(PC)+ 1→ TOS,
k
→
PC<10:0>,
(PCLATH<4:3>)
→
PC<12:11>
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH.
CALL
is a two-cycle
instruction.
CLRWDT
Syntax:
Operands:
Operation:
Clear Watchdog Timer
[
label
] CLRWDT
None
00h
→
WDT
0
→
WDT prescaler,
1
→
TO
1
→
PD
TO, PD
CLRWDT
instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
Status Affected:
Description:
Status Affected:
Description:
DS30605C-page 102
2000 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
