PIC16F684
If the A/D interrupt is enabled, the device awakens from
Sleep. If the GIE bit (INTCON<7>) is set, the program
counter is set to the interrupt vector (0004h), if GIE is
clear, the next instruction is executed. If the A/D inter-
rupt is not enabled, the A/D module is turned off,
although the ADON bit remains set.
9.3
A/D Operation During Sleep
The A/D converter module can operate during Sleep.
This requires the A/D clock source to be set to the
internal oscillator. When the RC clock source is
selected, the A/D waits one instruction before starting
the conversion. This allows the SLEEPinstruction to be
executed, thus eliminating much of the switching noise
from the conversion. When the conversion is complete,
the GO/DONE bit is cleared and the result is loaded
into the ADRESH:ADRESL registers.
When the A/D clock source is something other than
RC, a SLEEPinstruction causes the present conversion
to be aborted, and the A/D module is turned off. The
ADON bit remains set.
FIGURE 9-5:
A/D TRANSFER FUNCTION
Full-Scale Range
3FFh
3FEh
3FDh
3FCh
3FBh
1 LSB ideal
Full-Scale
Transition
004h
003h
002h
001h
000h
Analog Input Voltage
1 LSB ideal
VREF
Zero-Scale
Transition
0V
The appropriate analog input channel must be selected
and the minimum acquisition done before the “special
event trigger” sets the GO/DONE bit (starts a
conversion).
9.4
Effects of Reset
A device Reset forces all registers to their Reset state.
Thus, the A/D module is turned off and any pending
conversion is aborted. The ADRESH:ADRESL
registers are unchanged.
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter. See
Section 11.0 “Enhanced Capture/Compare/PWM
(ECCP) Module” for more information.
9.5
Use of the ECCP Trigger
An A/D conversion can be started by the “special event
trigger” of the ECCP module. This requires that the
CCP1M3:CCP1M0
bits
(CCP1CON<3:0>)
be
programmed as ‘1011’ and that the A/D module is
enabled (ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead (moving the
ADRESH:ADRESL to the desired location).
2004 Microchip Technology Inc.
Preliminary
DS41202C-page 69
MICROCHIP [ MICROCHIP ]
