PIC16F872
FIGURE 2-2:
PIC16F872 REGISTER FILE MAP
File
Address
Indirect addr.
(*)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
Indirect addr.
(*)
80h
OPTION_REG 81h
PCL
82h
STATUS
83h
FSR
84h
TRISA
85h
TRISB
86h
TRISC
87h
88h
89h
PCLATH
8Ah
INTCON
8Bh
PIE1
8Ch
PIE2
8Dh
PCON
8Eh
8Fh
90h
SSPCON2
91h
PR2
92h
SSPADD
93h
SSPSTAT
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
ADRESL
9Eh
9Fh
ADCON1
General
Purpose
Register
32 Bytes
A0h
accesses
20h-7Fh
BFh
C0h
EFh
F0h
FFh
Bank 2
16Fh
170h
17Fh
accesses
A0h - BFh
1BFh
1C0h
1EFh
1F0h
1FFh
Indirect addr.
(*)
100h
101h
TMR0
102h
PCL
103h
STATUS
104h
FSR
105h
106h
PORTB
107h
108h
109h
10Ah
PCLATH
10Bh
INTCON
10Ch
EEDATA
EEADR
10Dh
10Eh
EEDATH
10Fh
EEADRH
110h
Indirect addr.
(*)
OPTION_REG
PCL
STATUS
FSR
TRISB
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
PCLATH
INTCON
EECON1
EECON2
Reserved
(1)
Reserved
(1)
ADRESH
ADCON0
120h
1A0h
General
Purpose
Register
96 Bytes
7Fh
Bank 0
accesses
70h-7Fh
Bank 1
accesses
70h-7Fh
accesses
70h-7Fh
Bank 3
Unimplemented data memory locations, read as ’0’.
* Not a physical register.
Note 1:
These registers are reserved; maintain these registers clear.
DS30221A-page 8
Preliminary
©
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
