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PIC16F876-20I/SO 参数 Datasheet PDF下载

PIC16F876-20I/SO图片预览
型号: PIC16F876-20I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS闪存微控制器 [28/40-pin 8-Bit CMOS FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 200 页 / 3544 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F87X  
9.1  
SPI Mode  
FIGURE 9-1: MSSP BLOCK DIAGRAM  
(SPI MODE)  
The SPI mode allows 8 bits of data to be synchronously  
transmitted and received simultaneously. All four  
modes of SPI are supported. To accomplish communi-  
cation, typically three pins are used:  
Internal  
Data Bus  
Read  
Write  
• Serial Data Out (SDO)  
• Serial Data In (SDI)  
• Serial Clock (SCK)  
SSPBUF reg  
SSPSR reg  
Additionally, a fourth pin may be used when in a slave  
mode of operation:  
Shift  
Clock  
SDI  
bit0  
• Slave Select (SS)  
When initializing the SPI, several options need to be  
specified. This is done by programming the appropriate  
control bits (SSPCON<5:0> and SSPSTAT<7:6>).  
These control bits allow the following to be specified:  
SDO  
Control  
Enable  
SS  
• Master Mode (SCK is the clock output)  
• Slave Mode (SCK is the clock input)  
• Clock Polarity (Idle state of SCK)  
SS  
Edge  
Select  
• Data input sample phase  
(middle or end of data output time)  
2
Clock Select  
• Clock edge  
(output data on rising/falling edge of SCK)  
SSPM3:SSPM0  
SMP:CKE  
• Clock Rate (Master mode only)  
4
TMR2 output  
2
2
• Slave Select Mode (Slave mode only)  
Edge  
Select  
Figure 9-4 shows the block diagram of the MSSP mod-  
ule when in SPI mode.  
TOSC  
Prescaler  
4, 16, 64  
SCK  
Data to TX/RX in SSPSR  
Data direction bit  
To enable the serial port, MSSP Enable bit, SSPEN  
(SSPCON<5>) must be set. To reset or reconfigure SPI  
mode, clear bit SSPEN, re-initialize the SSPCON reg-  
isters, and then set bit SSPEN. This configures the  
SDI, SDO, SCK and SS pins as serial port pins. For the  
pins to behave as the serial port function, some must  
have their data direction bits (in the TRIS register)  
appropriately programmed. That is:  
• SDI is automatically controlled by the SPI module  
• SDO must have TRISC<5> cleared  
• SCK (Master mode) must have TRISC<3>  
cleared  
• SCK (Slave mode) must have TRISC<3> set  
• SS must have TRISA<5> set  
Any serial port function that is not desired may be over-  
ridden by programming the corresponding data direc-  
tion (TRIS) register to the opposite value.  
1999 Microchip Technology Inc.  
DS30292A-page 67