PIC16F872
TABLE 8-2:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Value on:
POR,
BOR
Value on
all other
resets
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh,8Bh,
10Bh,18Bh
INTCON
PIR1
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x 0000 000u
0Ch
(1)
(1)
ADIF
ADIE
(1)
(1)
(1)
(1)
SSPIF
SSPIE
CCP1IF
CCP1IE
TMR2IF
TMR2IE
TMR1IF r0rr 0000 r0rr 0000
8Ch
87h
0Eh
0Fh
10h
15h
16h
17h
PIE1
TMR1IE r0rr 0000 r0rr 0000
1111 1111 1111 1111
TRISC
PORTC Data Direction Register
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
—
CCP1X
CCP1Y
CCP1M3
CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
Legend: x= unknown, u= unchanged, r = reserved, -= unimplemented read as ’0’. Shaded cells are not used by Capture and
Timer1.
Note 1: These bits are reserved; always maintain these bits clear.
TABLE 8-3:
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Value on:
POR,
BOR
Value on
all other
resets
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh,8Bh,
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x 0000 000u
10Bh,18Bh
0Ch
8Ch
PIR1
PIE1
(1)
(1)
ADIF
ADIE
(1)
(1)
(1)
(1)
SSPIF
SSPIE
CCP1IF
CCP1IE
TMR2IF
TMR2IE
TMR1IF
TMR1IE
r0rr 0000 r0rr 0000
r0rr 0000 r0rr 0000
87h
11h
92h
12h
15h
16h
17h
TRISC
PORTC Data Direction Register
Timer2 module’s register
1111 1111 1111 1111
0000 0000 0000 0000
1111 1111 1111 1111
TMR2
PR2
Timer2 module’s period register
T2CON
CCPR1L
CCPR1H
CCP1CON
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
—
CCP1X
CCP1Y
CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
Legend: x= unknown, u= unchanged, r = reserved, -= unimplemented read as ’0’. Shaded cells are not used by PWM and
Timer2.
Note 1: These bits are reserved; always maintain these bits clear.
1999 Microchip Technology Inc.
Preliminary
DS30221A-page 51
MICROCHIP [ MICROCHIP ]
