PIC16F62X
11.1
Configuring the Voltage Reference
11.0 VOLTAGE REFERENCE
MODULE
The Voltage Reference can output 16 distinct voltage
levels for each range.
The Voltage Reference is a 16-tap resistor ladder
network that provides a selectable voltage reference.
The resistor ladder is segmented to provide two ranges
of VREF values and has a power-down function to
conserve power when the reference is not being used.
The VRCON register controls the operation of the
reference as shown in Figure 11-1. The block diagram
is given in Figure 11-2.
The equations used to calculate the output of the
Voltage Reference are as follows:
if VRR = 1: VREF = (VR<3:0>/24) x VDD
if VRR = 0: VREF = (VDD x 1/4) + (VR<3:0>/32) x VDD
The setting time of the Voltage Reference must be
considered when changing the VREF output
(Table 12-2). Example 11-1 shows an example of how
to configure the Voltage Reference for an output volt-
age of 1.25V with VDD = 5.0V.
FIGURE 11-1: VRCON REGISTER(ADDRESS 9Fh)
R/W-0
R/W-0
R/W-0
VRR
U-0
R/W-0
R/W-0
R/W-0
R/W-0
VREN
VROE
—
VR3
VR2
VR1
VR0
R = Readable bit
W = Writable bit
bit7
bit0
U = Unimplemented bit, read
as ’0’
-n = Value at POR reset
bit 7:
bit 6:
bit 5:
bit 4:
VREN: VREF Enable
1= VREF circuit powered on
0= VREF circuit powered down, no IDD drain
VROE: VREF Output Enable
1= VREF is output on RA2 pin
0= VREF is disconnected from RA2 pin
VRR: VREF Range selection
1= Low Range
0= High Range
Unimplemented: Read as '0'
bit 3-0: VR<3:0>: VREF value selection 0 ≤ VR [3:0] ≤ 15
when VRR = 1: VREF = (VR<3:0>/ 24) * VDD
when VRR = 0: VREF = 1/4 * VDD + (VR<3:0>/ 32) * VDD
FIGURE 11-2: VOLTAGE REFERENCE BLOCK DIAGRAM
16 Stages
VREN
R
R
R
8R
R
8R
VRR
VR3
VR0
VREF
(From VRCON<3:0>)
16-1 Analog Mux
Note: R is defined in Table 12-3.
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 69
MICROCHIP [ MICROCHIP ]
