PIC16F62X
TABLE 4-3:
SPECIAL FUNCTION REGISTERS SUMMARY BANK2
Value on
all other
resets(1)
Value on
POR
Reset
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 1
100h
INDF
TMR0
Addressing this location uses contents of FSR to address data memory (not a physical reg- xxxx xxxx
ister)
xxxx xxxx
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
RBPU
Program Counter’s (PC) Least Significant Byte
IRP RP1 RP0 TO
Indirect data memory address pointer
INTEDG
T0CS
T0SE
PSA
PD
PS2
Z
PS1
DC
PS0
C
1111 1111
1111 1111
PCL
0000 0000
0000 0000
STATUS
0001 1xxx
000q quuu
FSR
xxxx xxxx
uuuu uuuu
Unimplemented
PORTB
—
—
TRISB7 TRISB6
TRISB5 TRISB4 TRISB3 TRISB2
TRISB1
TRISB0
1111 1111
1111 1111
Unimplemented
Unimplemented
Unimplemented
PCLATH
—
—
—
—
—
—
—
—
—
Write buffer for upper 5 bits of program counter
INTE RBIE T0IF INTF RBIF
---0 0000
---0 0000
INTCON
GIE
PEIE
T0IE
0000 000x
0000 000u
—
—
—
—
—
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unimplemented
Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Note 1: Other (non power-up) resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during
normal operation.
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 17
MICROCHIP [ MICROCHIP ]
