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PIC16F627-20/P 参数 Datasheet PDF下载

PIC16F627-20/P图片预览
型号: PIC16F627-20/P
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器 [FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 160 页 / 1657 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F62X  
The user will note that address 2007h is beyond  
the user program memory space. In fact, it belongs  
to the special configuration memory space (2000h  
– 3FFFh), which can be accessed only during program-  
ming.  
14.1  
Configuration Bits  
The configuration bits can be programmed (read as ’0’)  
or left unprogrammed (read as ’1’) to select various  
device configurations. These bits are mapped in  
program memory location 2007h.  
FIGURE 14-1: CONFIGURATION WORD  
CP1 CP0  
bit13  
CP1  
CP0  
-
CPD LVP BODEN MCLRE FOSC2  
PWRTE  
WDTE  
F0SC1  
F0SC0  
bit0  
Register:CONFIG  
Address2007h  
bit 13-10:CP1:CP0: Code Protection bits (2)  
Code protection for 2K program memory  
11= Program memory code protection off  
10= 0400h-07FFh code protected  
01= 0200h-07FFh code protected  
00= 0000h-07FFhcode protected  
Code protection for 1K program memory  
11= Program memory code protection off  
10= Program memory code protection off  
01= 0200h-03FFh code protected  
00= 0000h-03FFh code protected  
bit 8:  
bit 7:  
bit 6:  
bit 5:  
bit 3:  
bit 2:  
CPD: Data Code Protection bit(3)  
1= Data memory code protection off  
0= Data memory code protected  
LVP: Low Voltage Programming Enable  
1= RB4/PGM pin has PGM function, low voltage programming enabled  
0= RB4/PGM is digital I/O, HV on MCLR must be used for programming  
BODEN: Brown-out Detect Enable bit (1)  
1= BOD enabled  
0= BOD disabled  
MCLRE: RA5/MCLR pin function select  
1= RA5/MCLR pin function is MCLR  
0= RA5/MCLR pin function is digital I/O, MCLR internally tied to VDD  
PWRTE: Power-up Timer Enable bit (1)  
1= PWRT disabled  
0= PWRT enabled  
WDTE: Watchdog Timer Enable bit  
1= WDT enabled  
0= WDT disabled  
bit 4,1-0:FOSC2:FOSC0: Oscillator Selection bits(4)  
111= ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN  
110= ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN  
101= INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN  
100= INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN  
011= EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN  
010= HS oscillator: High speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN  
001= XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN  
000= LP oscillator: Low power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN  
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT) regardless of the value of bit PWRTE. Ensure the  
Power-up Timer is enabled anytime Brown-out Reset is enabled.  
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.  
3: The entire data EEPROM will be erased when the code protection is turned off.  
4: When MCLR is asserted in INTRC or ER mode, the internal clock oscillator is disabled.  
DS40300B-page 96  
Preliminary  
1999 Microchip Technology Inc.  
 
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