PIC16F62X
FIGURE 12-9: ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
Start
bit
Start
bit
RC7/RX/DT (pin)
bit0
bit1
Stop
bit
bit8 Stop
bit
bit0
bit8
Rcv shift reg
Rcv buffer reg
WORD 1
RCREG
Bit8 = 0, Data Byte
Bit8 = 1, Address Byte
Read Rcv
buffer reg
RCREG
RCIF
(interrupt flag)
’1’
’1’
ADEN = 1
(address match
enable)
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (receive buffer)
because ADEN = 1 and bit8 = 0.
FIGURE 12-10: ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
Start
bit
Start
bit
RC7/RX/DT (pin)
bit0
bit1
Stop
bit
bit8 Stop
bit
bit0
bit8
Rcv shift
reg
Rcv buffer reg
WORD 1
RCREG
Bit8 = 1, Address Byte
Bit8 = 0, Data Byte
Read Rcv
buffer reg
RCREG
RCIF
(interrupt flag)
’1’
’1’
ADEN = 1
(address match
enable)
Note: This timing diagram shows an address byte followed by an data byte. The data byte is not read into the RCREG (receive buffer)
because ADEN was not updated (still = 1) and bit8 = 0.
FIGURE 12-11: ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST FOLLOWED BY VALID
DATA BYTE
Start
bit
Start
bit
RC7/RX/DT (pin)
bit0
bit1
Stop
bit
bit8 Stop
bit
bit0
bit8
Rcv shift
reg
Rcv buffer reg
WORD 1
RCREG
WORD 2
RCREG
Bit8 = 1, Address Byte
Bit8 = 0, Data Byte
Read Rcv
buffer reg
RCREG
RCIF
(interrupt flag)
ADEN
(address match
enable)
Note: This timing diagram shows an address byte followed by an data byte. The data byte is read into the RCREG (receive buffer)
because ADEN was updated after an address match, and was cleared to a ‘0’, so the contents of the receive shift register (RSR)
are read into the receive buffer regardless of the value of bit8.
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 81
MICROCHIP [ MICROCHIP ]
