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PIC16F627-20/P 参数 Datasheet PDF下载

PIC16F627-20/P图片预览
型号: PIC16F627-20/P
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器 [FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 160 页 / 1657 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F62X  
4.2.2.5  
PIR1 REGISTER  
Note: Interrupt flag bits get set when an interrupt  
condition occurs regardless of the state of  
its corresponding enable bit or the global  
enable bit, GIE (INTCON<7>). User  
software should ensure the appropriate  
interrupt flag bits are clear prior to enabling  
an interrupt.  
This register contains interrupt flag bits.  
REGISTER 4-5: PIR1 REGISTER (ADDRESS 0CH)  
R/W-0  
EEIF  
bit7  
R/W-0  
CMIF  
R-0  
R-0  
U
R/W-0  
R/W-0  
R/W-0  
RCIF  
TXIF  
-
CCP1IF TMR2IF TMR1IF  
R = Readable bit  
W = Writable bit  
U = Unimplemented bit, read  
as ’0’  
bit0  
-n = Value at POR reset  
bit 7:  
bit 6:  
bit 5:  
bit 4:  
EEIF: EEPROM Write Operation Interrupt Flag bit  
1= The write operation completed (must be cleared in software)  
0= The write operation has not completed or has not been started  
CMIF: Comparator Interrupt Flag bit  
1= Comparator input has changed  
0= Comparator input has not changed  
RCIF: USART Receive Interrupt Flag bit  
1= The USART receive buffer is full  
0= The USART receive buffer is empty  
TXIF: USART Transmit Interrupt Flag bit  
1= The USART transmit buffer is empty  
0= The USART transmit buffer is full  
bit 3:  
bit 2:  
Unimplemented: Read as ‘0’  
CCP1IF: CCP1 Interrupt Flag bit  
Capture Mode  
1= A TMR1 register capture occurred (must be cleared in software)  
0= No TMR1 register capture occurred  
Compare Mode  
1= A TMR1 register compare match occurred (must be cleared in software)  
0= No TMR1 register compare match occurred  
PWM Mode  
Unused in this mode  
bit 1:  
bit 0:  
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit  
1= TMR2 to PR2 match occurred (must be cleared in software)  
0= No TMR2 to PR2 match occurred  
TMR1IF: TMR1 Overflow Interrupt Flag bit  
1= TMR1 register overflowed (must be cleared in software)  
0= TMR1 register did not overflow  
1999 Microchip Technology Inc.  
Preliminary  
DS40300B-page 23