PIC16F62X
TABLE 14-7: INITIALIZATION CONDITION FOR REGISTERS
•
•
MCLR Reset during
•
•
Wake up from
SLEEP through
interrupt
Wake up from
SLEEP through
WDT time-out
normal operation
MCLR Reset during
SLEEP
WDT Reset
Brown-out Detect (1)
•
•
Register
Address
Power-on Reset
W
-
xxxx xxxx
-
uuuu uuuu
-
uuuu uuuu
-
INDF
TMR0
PCL
00h
01h
02h
xxxx xxxx
0000 0000
uuuu uuuu
0000 0000
uuuu uuuu
PC + 1(3)
000q quuu(4)
uuuu uuuu
xxxx u000
uuuu uuuu
--uu uuuu
-000 0000
--00 0000
0000 -00x
0000 0000
---0 0000
0000 000u
uuuq quuu(4)
uuuu uuuu
xxxx 0000
uuuu uuuu
STATUS
FSR
03h
04h
05h
06h
10h
12h
17h
18h
1Fh
0Ah
0Bh
0001 1xxx
xxxx xxxx
xxxx 0000
xxxx xxxx
--00 0000
-000 0000
--00 0000
0000 -00x
0000 0000
---0 0000
0000 000x
PORTA
PORTB
T1CON
T2CON
CCP1CON
RCSTA
CMCON
PCLATH
INTCON
uu-- uuuu
---u uuuu
uuuu uqqq(2)
-q-- ----(2,5)
uuuu uuuu
uu-u uuuu
uuuu uuuu
uuuu -uuu
---- --uu
PIR1
OPTION
TRISA
TRISB
PIE1
0Ch
81h
85h
86h
8Ch
8Eh
98h
9Ch
9Fh
0000 -000
1111 1111
11-1 1111
1111 1111
0000 -000
---- 1-0x
0000 -010
---- x000
000- 0000
0000 -000
1111 1111
11-- 1111
1111 1111
0000 -000
---- 1-uq(1,6)
0000 -010
PCON
TXSTA
EECON1
VRCON
---- q000
000- 0000
uuu- uuuu
Legend: u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’, q= value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 14-6 for reset value for specific condition.
5: If wake-up was due to comparator input changing, then bit 6 = 1. All other interrupts generating a wake-up will cause
bit 6 = u.
6: If reset was due to brown-out, then bit 0 = 0. All other resets will cause bit 0 = u.
DS40300B-page 104
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
