PIC16CE62X
TABLE 10-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS
Program
Counter
STATUS
Register
PCON
Register
Condition
Power-on Reset
000h
000h
000h
000h
PC + 1
000h
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset
WDT Wake-up
Brown-out Reset
(1)
Interrupt Wake-up from SLEEP
PC + 1
Legend: u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the interrupt vector
(0004h) after execution of PC+1.
TABLE 10-6: INITIALIZATION CONDITION FOR REGISTERS
•
•
MCLR Reset during
normal operation
MCLR Reset during
SLEEP
•
•
Wake up from SLEEP
through interrupt
Wake up from SLEEP
through WDT time-out
•
•
WDT Reset
(1)
Register
Address
Power-on Reset
Brown-out Reset
xxxx xxxx
-
uuuu uuuu
-
uuuu uuuu
-
W
-
INDF
TMR0
00h
01h
xxxx xxxx
uuuu uuuu
uuuu uuuu
(3)
0000 0000
0000 0000
PC + 1
PCL
02h
(4)
(4)
0001 1xxx
xxxx xxxx
---x xxxx
xxxx xxxx
00-- 0000
---0 0000
000q quuu
uuuq quuu
STATUS
FSR
03h
04h
05h
06h
1Fh
0Ah
uuuu uuuu
---u uuuu
uuuu uuuu
00-- 0000
---0 0000
uuuu uuuu
---u uuuu
uuuu uuuu
uu-- uuuu
---u uuuu
PORTA
PORTB
CMCON
PCLATH
(2)
0000 000x
0000 000x
uuuu uuuu
INTCON
0Bh
(2)
-0-- ----
1111 1111
---1 1111
1111 1111
-0-- ----
-0-- ----
1111 1111
---1 1111
1111 1111
-0-- ----
-u-- ----
PIR1
0Ch
81h
85h
86h
8Ch
uuuu uuuu
---u uuuu
uuuu uuuu
-u-- ----
OPTION
TRISA
TRISB
PIE1
(1)
---- --0x
uuuu u111
000- 0000
---- --uq
---- --uu
uuuu u111
uuu- uuuu
PCON
8Eh
90h
9Fh
uuuu u111
000- 0000
EEINTF
VRCON
Legend: u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’,q= value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 10-5 for reset value for specific condition.
DS40182A-page 56
Preliminary
1998 Microchip Technology Inc.