PIC16F87XA
2.0
MEMORY ORGANIZATION
2.1
Program Memory Organization
There are three memory blocks in each of the
PIC16F87XA devices. The Program Memory and Data
Memory have separate buses so that concurrent
access can occur and is detailed in this section. The
EEPROM data memory block is detailed in Section 3.0.
Additional information on device memory may be found
in the PICmicro Mid-Range Reference Manual
(DS33023).
The PIC16F87XA devices have a 13-bit program
counter capable of addressing an 8K word x 14 bit pro-
gram memory space. The PIC16F876A/877A devices
have 8K words x 14 bits of FLASH program memory,
while PIC16F873A/874A devices have 4K words x 14
bits. Accessing a location above the physically imple-
mented address will cause a wraparound.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 2-1:
PIC16F876A/877A
PROGRAM MEMORY MAP
AND STACK
PC<12:0>
FIGURE 2-2:
PIC16F873A/874A
PROGRAM MEMORY MAP
AND STACK
PC<12:0>
CALL, RETURN
RETFIE, RETLW
13
CALL, RETURN
RETFIE, RETLW
13
Stack Level 1
Stack Level 2
Stack Level 1
Stack Level 2
Stack Level 8
Stack Level 8
RESET Vector
0000h
RESET Vector
0000h
Interrupt Vector
0004h
0005h
Interrupt Vector
0004h
0005h
Page 0
07FFh
0800h
On-Chip
Program
Memory
Page 0
07FFh
0800h
Page 1
On-Chip
Program
Memory
Page 2
17FFh
1800h
0FFFh
1000h
Page 1
0FFFh
1000h
Page 3
1FFFh
1FFFh
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 13
MICROCHIP [ MICROCHIP TECHNOLOGY ]
