PIC16C505
4.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control
the operation of the device (Table 4-1).
The special registers can be classified into two sets.
The special function registers associated with the
“core” functions are described in this section. Those
related to the operation of the peripheral features are
described in the section for each peripheral feature.
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY
Value on
Power-On
Reset
xxxx xxxx
xxxx xxxx
1111 1111
TO
PD
Z
DC
C
Address
00h
01h
02h
(1)
03h
04h
05h
N/A
N/A
N/A
06h
07h
Name
INDF
TMR0
PCL
STATUS
FSR
OSCCAL
TRISB
TRISC
OPTION
PORTB
PORTC
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
Value on
MCLR and
WDT Reset
uuuu uuuu
uuuu uuuu
1111 1111
000q quuu
11uu uuuu
uuuu uu--
--11 1111
--11 1111
1111 1111
--uu uuuu
--uu uuuu
Value on
Wake-up on
Pin Change
uuuu uuuu
uuuu uuuu
1111 1111
100q quuu
11uu uuuu
uuuu uu--
--11 1111
--11 1111
1111 1111
--uu uuuu
--uu uuuu
Uses contents of FSR to address data memory (not a physical register)
8-bit real-time clock/counter
Low order 8 bits of PC
RBWUF
—
PAO
0001 1xxx
110x xxxx
Indirect data memory address pointer
CAL5
—
—
RBWU
—
—
CAL4
—
—
RBPU
—
—
TOCS
RB5
RC5
TOSE
RB4
RC4
CAL3
CAL2
CAL1
CAL0
—
—
1000 00--
--11 1111
--11 1111
I/O control registers
I/O control registers
PSA
RB3
RC3
PS2
RB2
RC2
PS1
RB1
RC1
PS0
RB0
RC0
1111 1111
--xx xxxx
--xx xxxx
Legend: Shaded cellls not used by Port Registers, read as ‘0’,
—
= unimplemented, read as ‘0’, x = unknown, u = unchanged.
©
1998 Microchip Technology Inc.
Preliminary
DS40192A-page 13