PIC16F87XA
8.3.3
SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the CCP module for PWM operation:
1. Set the PWM period by writing to the PR2
register.
2. Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
3. Make the CCP1 pin an output by clearing the
TRISC<2> bit.
4. Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
5. Configure the CCP1 module for PWM operation.
TABLE 8-3:
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
PWM Frequency
1.22 kHz 4.88 kHz 19.53 kHz
78.12kHz
156.3 kHz 208.3 kHz
Timer Prescaler (1, 4, 16)
PR2 Value
16
0xFFh
10
4
1
1
0x3Fh
8
1
0x1Fh
7
1
0xFFh
10
0xFFh
10
0x17h
5.5
Maximum Resolution (bits)
TABLE 8-4:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1
Value on: Value on
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR,
BOR
all other
RESETS
0Bh,8Bh,
INTCON
GIE
PEIE
TMR0IE
INTE
RBIE
TMR0IF
INTF
RBIF 0000 000x 0000 000u
10Bh, 18Bh
(1)
0Ch
0Dh
8Ch
8Dh
87h
0Eh
0Fh
10h
15h
16h
17h
1Bh
1Ch
1Dh
PIR1
PSPIF
—
ADIF
—
RCIF
—
TXIF
—
SSPIF
—
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
CCP2IF ---- ---0 ---- ---0
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
PIR2
—
—
(1)
PIE1
PSPIE
—
ADIE
—
RCIE
—
TXIE
—
SSPIE
—
PIE2
—
—
CCP2IE ---- ---0 ---- ---0
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
TRISC
TMR1L
TMR1H
T1CON
PORTC Data Direction Register
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
—
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
CCPR1L Capture/Compare/PWM Register1 (LSB)
CCPR1H Capture/Compare/PWM Register1 (MSB)
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
CCP1CON
—
—
CCP1X
CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
CCPR2L Capture/Compare/PWM Register2 (LSB)
CCPR2H Capture/Compare/PWM Register2 (MSB)
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
CCP2CON
—
—
CCP2X
CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
Legend: x= unknown, u= unchanged, -= unimplemented, read as '0'. Shaded cells are not used by Capture and Timer1.
Note 1: The PSP is not implemented on 28-pin devices; always maintain these bits clear.
DS39582A-page 66
AdvanceInformation
2001 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
