PIC16F87XA
“RESET state” on Power-on Reset (POR), on the
MCLR and WDT Reset, on MCLR Reset during
SLEEP, and Brown-out Reset (BOR). They are not
affected by a WDT Wake-up, which is viewed as the
resumption of normal operation. The TO and PD bits
are set or cleared differently in different RESET situa-
tions, as indicated in Table 14-4. These bits are used in
software to determine the nature of the RESET. See
Table 14-6 for a full description of RESET states of all
registers.
14.3 RESET
The PIC16F87XA differentiates between various kinds
of RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
• Brown-out Reset (BOR)
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 14-4.
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
FIGURE 14-4:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR
SLEEP
WDT
WDT
Module
Time-out
Reset
VDD Rise
Detect
Power-on Reset
VDD
Brown-out
Reset
S
BODEN
OST/PWRT
OST
Chip_Reset
10-bit Ripple Counter
R
Q
OSC1
(1)
On-chip
RC OSC
PWRT
10-bit Ripple Counter
Enable PWRT
Enable OST
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 145
MICROCHIP [ MICROCHIP ]
