PIC16F87XA
TABLE 4-1:
Name
PORTA FUNCTIONS
Bit#
Buffer
Function
RA0/AN0
bit0
bit1
bit2
bit3
bit4
TTL Input/output or analog input.
TTL Input/output or analog input.
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
TTL Input/output or analog input or VREF- or CVREF.
TTL Input/output or analog input or VREF+.
ST
Input/output or external clock input for Timer0 or comparator output.
Output is open drain type.
RA5/SS/AN4/C2OUT
bit5
TTL Input/output or slave select input for synchronous serial port or analog
input or comparator output.
Legend: TTL = TTL input, ST = Schmitt Trigger input
TABLE 4-2:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Value on:
POR,
BOR
Value on
all other
RESETS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RA0
CM0
05h
85h
9Ch
9Dh
9Fh
PORTA
TRISA
—
—
—
—
RA5
RA4
RA3
RA2
RA1
--0x 0000 --0u 0000
--11 1111 --11 1111
0000 0111 0000 0111
PORTA Data Direction Register
CMCON
C2OUT C1OUT C2INV
C1INV
—
CIS
CM2
CM1
CVRCON CVREN CVROE CVRR
ADCON1 ADFM ADCS2
CVR3
CVR2
CVR1
CVR0 000- 0000 000- 0000
—
—
PCFG3 PCFG2 PCFG1 PCFG0 --0- 0000 --0- 0000
Legend: x= unknown, u= unchanged, -= unimplemented locations read as '0'. Shaded cells are not used by PORTA.
Note: When using the SSP module in SPI Slave mode and SS enabled, the A/D converter must be set to one of
the following modes, where PCFG3:PCFG0 = 0100, 0101, 011x, 1101, 1110, 1111.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 41