PIC16F87XA
TABLE 14-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset
Wake-up via WDT or
Interrupt
Register
Devices
W
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
73A 74A 76A 77A
xxxx xxxx
N/A
uuuu uuuu
N/A
uuuu uuuu
N/A
INDF
TMR0
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--0x 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000 000x
r000 0000
0000 0000
-0-0 0--0
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
uuuu uuuu
0000 0000
000q quuu(3)
uuuu uuuu
--0u 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---0 0000
0000 000u
r000 0000
0000 0000
-0-0 0--0
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 000x
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
uuuu uuuu
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
uuuu uuuu
PC + 1(2)
PCL
STATUS
FSR
uuuq quuu(3)
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---u uuuu
uuuu uuuu(1)
ruuu uuuu(1)
uuuu uuuu(1)
-u-u u--u(1)
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uu-u
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
OPTION_REG
TRISA
TRISB
TRISC
TRISD
TRISE
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ’0’, q= value depends on condition,
r= reserved, maintain clear. Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 14-5 for RESET value for specific condition.
DS39582A-page 148
AdvanceInformation
2001 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
