PIC16F87XA
occurred. When the Brown-out Reset is disabled, the
state of the BOR bit is unpredictable and is, therefore,
not valid at any time.
14.10 Power Control/Status Register
(PCON)
The Power Control/Status Register, PCON, has up to
two bits depending upon the device.
Bit1 is POR (Power-on Reset Status bit). It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
Bit0 is the Brown-out Reset Status bit, BOR. The BOR
bit is unknown on a Power-on Reset. It must then be set
by the user and checked on subsequent RESETS to see
if it has been cleared, indicating that a BOR has
TABLE 14-3: TIME-OUT IN VARIOUS SITUATIONS
Power-up
Wake-up from
Oscillator Configuration
Brown-out
SLEEP
PWRTE = 0
PWRTE = 1
XT, HS, LP
RC
72 ms + 1024TOSC
72 ms
1024TOSC
—
72 ms + 1024TOSC
72 ms
1024TOSC
—
TABLE 14-4: STATUS BITS AND THEIR SIGNIFICANCE
POR
BOR
TO
PD
0
0
0
1
1
1
1
1
x
x
x
0
1
1
1
1
1
0
x
1
0
0
u
1
1
x
0
1
1
0
u
0
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
Legend: x= don’t care, u = unchanged
TABLE 14-5: RESET CONDITION FOR SPECIAL REGISTERS
Program
STATUS
Register
PCON
Register
Condition
Counter
Power-on Reset
000h
000h
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
000h
000h
WDT Wake-up
PC + 1
Brown-out Reset
000h
PC + 1(1)
Interrupt wake-up from SLEEP
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as '0'
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 147