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PIC16F873A-I/ML 参数 Datasheet PDF下载

PIC16F873A-I/ML图片预览
型号: PIC16F873A-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚增强型闪存微控制器 [28/40-pin Enhanced FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 222 页 / 3815 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F87XA  
3.7  
Protection Against Spurious Write  
3.8  
Operation During Code Protect  
There are conditions when the device should not write  
to the data EEPROM or FLASH program memory. To  
protect against spurious writes, various mechanisms  
have been built-in. On power-up, WREN is cleared.  
Also, the Power-up Timer (72 ms duration) prevents an  
EEPROM write.  
When the data EEPROM is code protected, the micro-  
controller can read and write to the EEPROM normally.  
However, all external access to the EEPROM is dis-  
abled. External write access to the program memory is  
also disabled.  
When program memory is code protected, the micro-  
controller can read and write to program memory nor-  
mally, as well as execute instructions. Writes by the  
device may be selectively inhibited to regions of the  
memory, depending on the setting of bits WR1:WR0 of  
the configuration word (see Section 14.1 for additional  
information). External access to the memory is also  
disabled.  
The write initiate sequence and the WREN bit together  
help prevent an accidental write during brown-out,  
power glitch, or software malfunction.  
TABLE 3-1:  
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM  
AND FLASH PROGRAM MEMORIES  
Value on  
Power-on  
Reset  
Value on  
all other  
RESETS  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
10Ch  
10Dh  
10Eh  
10Fh  
18Ch  
18Dh  
0Dh  
EEDATA EEPROM/FLASH Data Register Low Byte  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx ---0 q000  
xxxx xxxx ---- ----  
x--- x000 ---0 q000  
---- ---- ---- ----  
EEADR  
EEPROM/FLASH Address Register Low Byte  
EEDATH  
EEADRH  
EEPROM/FLASH Data Register High Byte  
EEPROM/FLASH Address Register High Byte  
EECON1 EEPGD  
WRERR WREN  
WR  
RD  
EECON2 EEPROM Control Register2 (not a physical register)  
PIR2  
PIE2  
CMIF  
CMIE  
EEIF  
EEIE  
BCLIF  
BCLIE  
CCP2IF -0-0 0--0 -0-0 0--0  
CCP2IE -0-0 0--0 -0-0 0--0  
8Dh  
Legend: x= unknown, u= unchanged, -= unimplemented, read as '0', q= value depends upon condition.  
Shaded cells are not used by Data EEPROM or FLASH Program Memory.  
2001 Microchip Technology Inc.  
Advance Information  
DS39582A-page 37