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PIC16F76-I/SOD23G 参数 Datasheet PDF下载

PIC16F76-I/SOD23G图片预览
型号: PIC16F76-I/SOD23G
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO28, 0.300 INCH, PLASTIC, MS-013, SO-28]
分类和应用: 时钟光电二极管外围集成电路
文件页数/大小: 174 页 / 4049 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X  
For example, CLRF STATUSwill clear the upper three  
bits and set the Z bit. This leaves the STATUS register  
as 000u u1uu(where u= unchanged).  
2.2.2.1  
STATUS Register  
The STATUS register contains the arithmetic status of  
the ALU, the RESET status and the bank select bits for  
data memory.  
It is recommended, therefore, that only BCF, BSF,  
SWAPF and MOVWF instructions are used to alter the  
STATUS register, because these instructions do not  
affect the Z, C, or DC bits from the STATUS register.  
For other instructions not affecting any status bits, see  
the "Instruction Set Summary."  
The STATUS register can be the destination for any  
instruction, as with any other register. If the STATUS  
register is the destination for an instruction that affects  
the Z, DC, or C bits, then the write to these three bits is  
disabled. These bits are set or cleared according to the  
device logic. Furthermore, the TO and PD bits are not  
writable, therefore, the result of an instruction with the  
STATUS register as destination may be different than  
intended.  
Note 1: The C and DC bits operate as a borrow  
and digit borrow bit, respectively, in sub-  
traction. See the SUBLW and SUBWF  
instructions for examples.  
REGISTER 2-1:  
STATUS REGISTER (ADDRESS 03h, 83h, 103h, 183h)  
R/W-0  
IRP  
R/W-0  
RP1  
R/W-0  
RP0  
R-1  
TO  
R-1  
PD  
R/W-x  
Z
R/W-x  
DC  
R/W-x  
C
bit 7  
bit 0  
bit 7  
IRP: Register Bank Select bit (used for indirect addressing)  
1= Bank 2, 3 (100h - 1FFh)  
0= Bank 0, 1 (00h - FFh)  
bit 6-5  
RP1:RP0: Register Bank Select bits (used for direct addressing)  
11= Bank 3 (180h - 1FFh)  
10= Bank 2 (100h - 17Fh)  
01= Bank 1 (80h - FFh)  
00= Bank 0 (00h - 7Fh)  
Each bank is 128 bytes  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
TO: Time-out bit  
1= After power-up, CLRWDTinstruction, or SLEEPinstruction  
0= A WDT time-out occurred  
PD: Power-down bit  
1= After power-up or by the CLRWDTinstruction  
0= By execution of the SLEEPinstruction  
Z: Zero bit  
1= The result of an arithmetic or logic operation is zero  
0= The result of an arithmetic or logic operation is not zero  
DC: Digit carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWFinstructions)  
1= A carry-out from the 4th low order bit of the result occurred  
0= No carry-out from the 4th low order bit of the result  
C: Carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWFinstructions)  
1= A carry-out from the Most Significant bit of the result occurred  
0= No carry-out from the Most Significant bit of the result occurred  
Note: For borrow, the polarity is reversed. A subtraction is executed by adding the twos  
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is  
loaded with either the high or low order bit of the source register.  
Legend:  
R = Readable bit  
- n = Value at POR reset  
W = Writable bit  
U = Unimplemented bit, read as 0’  
0= Bit is cleared x = Bit is unknown  
1= Bit is set  
2002 Microchip Technology Inc.  
DS30325B-page 19  
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