PIC16F7X
TABLE 15-7: SPI MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ† Max Units Conditions
70* TssL2scH, SS↓ to SCK↓ or SCK↑ input
TCY
—
—
ns
TssL2scL
71* TscH
72* TscL
SCK input high time (Slave mode)
SCK input low time (Slave mode)
TCY + 20
TCY + 20
100
—
—
—
—
—
—
ns
ns
ns
73* TdiV2scH, Setup time of SDI data input to SCK edge
TdiV2scL
74* TscH2diL, Hold time of SDI data input to SCK edge
TscL2diL
100
—
—
ns
75* TdoR
SDO data output rise time
Standard(F)
Extended(LF)
—
—
10
25
25
50
ns
ns
76* TdoF
SDO data output fall time
—
10
25
50
ns
ns
77* TssH2doZ SS↑ to SDO output hi-impedance
10
—
78* TscR
SCK output rise time
(Master mode)
Standard(F)
Extended(LF)
—
—
10
25
25
50
ns
ns
79* TscF
SCK output fall time (Master mode)
—
10
25
ns
80* TscH2doV, SDO data output valid after
TscL2doV SCK edge
Standard(F)
Extended(LF)
—
—
—
—
50
145
ns
ns
81* TdoV2scH, SDO data output setup to SCK edge
TdoV2scL
Tcy
—
—
ns
82* TssL2doV SDO data output valid after SS↓ edge
—
—
—
50
ns
ns
83* TscH2ssH, SS ↑ after SCK edge
1.5TCY + 40
—
TscL2ssH
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 15-15:
I2C BUS START/STOP BITS TIMING
SCL
SDA
91
93
90
92
STOP
Condition
START
Condition
Note: Refer to Figure 15-3 for load conditions.
DS30325B-page 134
2002 Microchip Technology Inc.