PIC16F/LF1946/47
TABLE 3-9:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Value on all
other
Resets
Value on:
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 8
400h(2)
INDF0
INDF1
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
401h(2)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
402h(2)
403h(2)
404h(2)
405h(2)
406h(2)
407h(2)
408h(2)
409h(2)
PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
—
—
—
TO
PD
Z
DC
C
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
WREG
Working Register
40Ah(1, 2) PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
PEIE TMR0IE INTE IOCIE TMR0IF
40Bh(2)
40Ch
40Dh
40Eh
40Fh
410h
411h
INTCON
ANSELF
ANSELG
—
GIE
INTF
IOCIF
ANSELF7 ANSELF6 ANSELF5 ANSELF4 ANSELF3 ANSELF2 ANSELF1 ANSELF0 1111 1111 1111 1111
—
—
—
ANSELG4 ANSELG3 ANSELG2 ANSELG1
—
---1 111- ---1 111-
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
412h
413h
414h
415h
416h
417h
418h
419h
41Ah
41Bh
41Ch
41Dh
41Eh
41Fh
Legend:
—
—
—
TMR4
PR4
T4CON
—
Timer 4 Module Register
Timer 4 Period Register
—
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
T4OUTPS<3:0>
TMR4ON
T4CKPS<1:0>
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer 6 Module Register
Timer 6 Period Register
—
—
—
—
—
—
—
—
—
—
—
—
TMR6
PR6
T6CON
—
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
T6OUTPS<3:0>
TMR6ON
T6CKPS<1:0>
Unimplemented
—
—
x= unknown, u= unchanged, q= value depends on condition, - = unimplemented, read as ‘0’, r= reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
2: These registers can be addressed from any bank.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 39
MICROCHIP [ MICROCHIP ]
