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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
TABLE 3-9:  
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)  
Value on all  
other  
Resets  
Value on:  
POR, BOR  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Bank 7  
380h(2)  
INDF0  
INDF1  
Addressing this location uses contents of FSR0H/FSR0L to address data memory  
(not a physical register)  
xxxx xxxx xxxx xxxx  
xxxx xxxx xxxx xxxx  
381h(2)  
Addressing this location uses contents of FSR1H/FSR1L to address data memory  
(not a physical register)  
382h(2)  
383h(2)  
384h(2)  
385h(2)  
386h(2)  
387h(2)  
388h(2)  
389h(2)  
PCL  
Program Counter (PC) Least Significant Byte  
0000 0000 0000 0000  
---1 1000 ---q quuu  
0000 0000 uuuu uuuu  
0000 0000 0000 0000  
0000 0000 uuuu uuuu  
0000 0000 0000 0000  
---0 0000 ---0 0000  
0000 0000 uuuu uuuu  
-000 0000 -000 0000  
0000 000x 0000 000u  
xxxx xxxx uuuu uuuu  
STATUS  
FSR0L  
FSR0H  
FSR1L  
FSR1H  
BSR  
TO  
PD  
Z
DC  
C
Indirect Data Memory Address 0 Low Pointer  
Indirect Data Memory Address 0 High Pointer  
Indirect Data Memory Address 1 Low Pointer  
Indirect Data Memory Address 1 High Pointer  
BSR<4:0>  
WREG  
Working Register  
38Ah(1, 2) PCLATH  
Write Buffer for the upper 7 bits of the Program Counter  
38Bh(2)  
38Ch  
38Dh  
38Eh  
38Fh  
390h  
391h  
392h  
393h  
394h  
395h  
396h  
397h  
398h  
399h  
39Ah  
39Bh  
39Ch  
39Dh  
39Eh  
39Fh  
Legend:  
INTCON  
LATF  
LATG  
GIE  
PEIE  
TMR0IE  
INTE  
IOCIE  
TMR0IF  
INTF  
IOCIF  
PORTF Data Latch  
LATG5  
LATG4  
LATG3  
LATG2  
LATG1  
LATG0 --xx xxxx --uu uuuu  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
IOCBP  
IOCBN  
IOCBF  
IOCBP7  
IOCBN7  
IOCBF7  
IOCBP6  
IOCBN6  
IOCBF6  
IOCBP5  
IOCBN5  
IOCBF5  
IOCBP4  
IOCBN4  
IOCBF4  
IOCBP3  
IOCBN3  
IOCBF3  
IOCBP2  
IOCBN2  
IOCBF2  
IOCBP1  
IOCBP0 0000 0000 0000 0000  
IOCBN1 IOCBN0 0000 0000 0000 0000  
IOCBF1 IOCBF0 0000 0000 0000 0000  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
x= unknown, u= unchanged, q= value depends on condition, - = unimplemented, read as ‘0’, r= reserved.  
Shaded locations are unimplemented, read as ‘0’.  
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred  
to the upper byte of the program counter.  
2: These registers can be addressed from any bank.  
DS41414A-page 38  
Preliminary  
2010 Microchip Technology Inc.  
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