PIC16C63A/65B/73B/74B
on MCLR Reset during SLEEP, and on BOR. The TO
and PD bits are set or cleared differently in different
RESET situations, as indicated in Table 13-4. These
bits are used in software to determine the nature of the
RESET. See Table 13-6 for a full description of RESET
states of all registers.
13.3 RESET
The PIC16CXX differentiates between various kinds of
RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR)
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 13-4.
The PICmicro devices have a MCLR noise filter in the
MCLR Reset path. The filter will detect and ignore
small pulses.
Some registers are not affected in any RESET condi-
tion; their status is unknown on POR and unchanged in
any other RESET. Most other registers are reset to a
“RESET state” on POR, on the MCLR and WDT Reset,
It should be noted that internal RESET sources do not
drive MCLR pin low.
FIGURE 13-4:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
RESET
MCLR
SLEEP
WDT
WDT
Module
Time-out
Reset
VDD Rise
Detect
Power-on Reset
VDD
Brown-out
Reset
S
BODEN
OST/PWRT
OST
10-bit Ripple Counter
Chip Reset
R
Q
OSC1
(Note 1)
PWRT
10-bit Ripple Counter
On-chip
RC OSC
Enable PWRT
Enable OST
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
DS30605C-page 88
2000 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
