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PIC16C73B-20/SP 参数 Datasheet PDF下载

PIC16C73B-20/SP图片预览
型号: PIC16C73B-20/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS微控制器 [28/40-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 184 页 / 2122 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16C63A/65B/73B/74B  
FIGURE 5-7:  
PORTE BLOCK DIAGRAM  
5.5  
PORTE and TRISE Register  
Data  
Bus  
Note 1: The PIC16C63A and PIC16C73B do not  
provide PORTE. The PORTE and TRISE  
registers are not implemented.  
D
Q
I/O pin(1)  
WR  
Port  
CK  
Data Latch  
2: The PIC16C63A/65B does not provide an  
A/D module. A/D functions are not imple-  
mented.  
D
Q
WR  
TRIS  
PORTE has three pins: RE0/RD/AN5, RE1/WR/AN6  
and RE2/CS/AN7, which are individually configured as  
inputs or outputs. These pins have Schmitt Trigger  
input buffers.  
Schmitt  
Trigger  
Input  
CK  
TRIS Latch  
Buffer  
I/O PORTE becomes control inputs for the micropro-  
cessor port when bit PSPMODE (TRISE<4>) is set. In  
this mode, the user must make sure that the  
TRISE<2:0> bits are set (pins are configured as digital  
inputs) and that register ADCON1 is configured for dig-  
ital I/O. In this mode, the input buffers are TTL.  
RD TRIS  
Q
D
EN  
RD Port  
Register 5-1 shows the TRISE register, which also con-  
trols the parallel slave port operation.  
PORTE pins may be multiplexed with analog inputs  
(PIC16C74B only). The operation of these pins is  
selected by control bits in the ADCON1 register. When  
selected as an analog input, these pins will read as 0s.  
Note 1: I/O pins have protection diodes to VDD and VSS.  
TRISE controls the direction of the RE pins, even when  
they are being used as analog inputs. The user must  
make sure to keep the pins configured as inputs when  
using them as analog inputs.  
Note: On a Power-on Reset, these pins are con-  
figured as analog inputs and read as 0s.  
TABLE 5-9:  
Name  
PORTE FUNCTIONS  
Bit#  
Buffer Type  
Function  
(1)  
RE0/RD/AN5  
bit0  
ST/TTL  
Input/output port pin or read control input in Parallel Slave Port mode or analog  
input:  
RD  
1 = Idle  
0 = Read operation. Contents of PORTD register is output to PORTD  
I/O pins (if chip selected).  
(1)  
RE1/WR/AN6  
RE2/CS/AN7  
bit1  
bit2  
ST/TTL  
Input/output port pin or write control input in Parallel Slave Port mode or analog  
input:  
WR  
1 = Idle  
0 = Write operation. Value of PORTD I/O pins is latched into PORTD  
register (if chip selected).  
(1)  
ST/TTL  
Input/output port pin or chip select control input in Parallel Slave Port mode or  
analog input:  
CS  
1 = Device is not selected  
0 = Device is selected  
Legend: ST = Schmitt Trigger input, TTL = TTL input  
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.  
2000 Microchip Technology Inc.  
DS30605C-page 35