PIC16C62B/72A
13.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 13-5: EXTERNAL CLOCK TIMING
Q1
1
Q2
Q3
Q4
4
Q4
Q1
OSC1
3
3
4
2
CLKOUT
TABLE 13-2: EXTERNAL CLOCK TIMING REQUIREMENTS
Param Sym
No.
Characteristic
Min Typ†
Max
Units
Conditions
1A
Fosc
External CLKIN Frequency
(Note 1)
DC
DC
DC
DC
DC
0.1
4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4
4
MHz RC and XT osc modes
MHz HS osc mode (-04)
MHz HS osc mode (-20)
kHz LP osc mode
20
200
4
Oscillator Frequency
(Note 1)
MHz RC osc mode
4
MHz XT osc mode
20
200
—
MHz HS osc mode
5
kHz LP osc mode
1
Tosc
External CLKIN Period
(Note 1)
250
250
50
ns
ns
ns
µs
ns
ns
ns
ns
µs
ns
ns
µs
ns
ns
ns
ns
RC and XT osc modes
HS osc mode (-04)
HS osc mode (-20)
LP osc mode
—
—
5
—
Oscillator Period
(Note 1)
250
250
250
50
—
RC osc mode
XT osc mode
10,000
250
250
—
HS osc mode (-04)
HS osc mode (-20)
LP osc mode
5
2
TCY
Instruction Cycle Time (Note 1) 200
DC
—
TCY = 4/FOSC
3*
TosL, External Clock in (OSC1) High
TosH or Low Time
100
2.5
15
—
XT oscillator
—
LP oscillator
—
HS oscillator
4*
TosR, External Clock in (OSC1) Rise
TosF
25
XT oscillator
or Fall Time
—
50
LP oscillator
—
15
HS oscillator
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are
based on characterization data for that particular oscillator type under standard operating conditions with the
device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or
higher than expected current consumption. All devices are tested to operate at "min." values with an external
clock applied to the OSC1/CLKIN pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
DS35008B-page 90
Preliminary
1998 Microchip Technology Inc.