PIC16C62B/72A
TABLE 10-6
Register
INITIALIZATION CONDITIONS FOR ALL REGISTERS
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
W
62B
62B
62B
62B
72A
72A
72A
72A
xxxx xxxx
N/A
uuuu uuuu
N/A
uuuu uuuu
N/A
INDF
TMR0
PCL
xxxx xxxx
0000h
uuuu uuuu
0000h
uuuu uuuu
PC + 1(2)
000q quuu(3)
uuuu uuuu
--0u 0000
uuuq quuu(3)
uuuu uuuu
--uu uuuu
STATUS
FSR
62B
72A
0001 1xxx
62B
62B
72A
72A
xxxx xxxx
--0x 0000
PORTA(4)
PORTB(5)
62B
62B
72A
72A
xxxx xxxx
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
uuuu uuuu(1)
---- uuuu(1)
PORTC(5)
PCLATH
INTCON
62B
62B
72A
72A
---0 0000
0000 000x
---0 0000
0000 000u
62B
62B
72A
72A
---- 0000
-0-- 0000
---- 0000
-0-- 0000
PIR1
-u-- uuuu(1)
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uu-u
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
-u-- uuuu
---- --uq
1111 1111
uuuu uuuu
uuuu uuuu
---- -uuu
TMR1L
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
62B
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
72A
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
---- 0000
-0-- 0000
---- --0q
1111 1111
0000 0000
0000 0000
---- -000
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
---- 0000
-0-- 0000
---- --uq
1111 1111
0000 0000
0000 0000
---- -000
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
ADRES
ADCON0
OPTION_REG
TRISA
TRISB
TRISC
PIE1
PCON
PR2
SSPADD
SSPSTAT
ADCON1
Legend:
u
= unchanged,
x = unknown, -= unimplemented bit, read as ’0’, q= value depends on condition
Note 1: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
3: See Table 10-5 for reset value for specific condition.
4: On any device reset, these pins are configured as inputs.
5: This is the value that will be in the port output latch.
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 61