欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16C72A-04/SP 参数 Datasheet PDF下载

PIC16C72A-04/SP图片预览
型号: PIC16C72A-04/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28引脚8位CMOS微控制器 [28-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 120 页 / 1994 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC16C72A-04/SP的Datasheet PDF文件第30页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第31页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第32页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第33页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第35页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第36页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第37页浏览型号PIC16C72A-04/SP的Datasheet PDF文件第38页  
PIC16C62B/72A  
7.1.4  
CCP PRESCALER  
7.1  
Capture Mode  
There are four prescaler settings, specified by bits  
CCP1M3:CCP1M0. Whenever the CCP module is  
turned off, or the CCP module is not in capture mode,  
the prescaler counter is cleared. This means that any  
reset will clear the prescaler counter.  
In Capture mode, CCPR1H:CCPR1L captures the  
16-bit value of the TMR1 register, when an event  
occurs on pin RC2/CCP1. An event is defined as:  
• every falling edge  
• every rising edge  
Switching from one capture prescaler to another may  
generate an interrupt. Also, the prescaler counter will  
not be cleared, therefore the first capture may be from  
a non-zero prescaler. Example 7-1 shows the recom-  
mended method for switching between capture pres-  
calers. This example also clears the prescaler counter  
and will not generate the “false” interrupt.  
• every 4th rising edge  
• every 16th rising edge  
An event is selected by control bits CCP1M3:CCP1M0  
(CCP1CON<3:0>). When a capture is made, the inter-  
rupt request flag bit ,CCP1IF (PIR1<2>), is set. It must  
be cleared in software. If another capture occurs before  
the value in register CCPR1 is read, the old captured  
value will be lost.  
EXAMPLE 7-1: CHANGING BETWEEN  
CAPTURE PRESCALERS  
FIGURE 7-1: CAPTURE MODE OPERATION  
BLOCK DIAGRAM  
CLRF  
CCP1CON  
;Turn CCP module off  
MOVLW NEW_CAPT_PS ;Load the W reg with  
; the new prescaler  
Set flag bit CCP1IF  
; mode value and CCP ON  
;Load CCP1CON with this  
; value  
(PIR1<2>)  
Prescaler  
÷ 1, 4, 16  
MOVWF CCP1CON  
RC2/CCP1  
Pin  
CCPR1H  
CCPR1L  
TMR1L  
Capture  
Enable  
and  
edge detect  
TMR1H  
CCP1CON<3:0>  
Q’s  
7.1.1  
CCP PIN CONFIGURATION  
In Capture mode, the RC2/CCP1 pin should be config-  
ured as an input by setting the TRISC<2> bit.  
Note: If the RC2/CCP1 is configured as an out-  
put, a write to the port can cause a capture  
condition.  
7.1.2  
TIMER1 MODE SELECTION  
Timer1 must be running in timer mode or synchronized  
counter mode for the CCP module to use the capture  
feature. In asynchronous counter mode, the capture  
operation may not work consistently.  
7.1.3  
SOFTWARE INTERRUPT  
When the Capture mode is changed, a false capture  
interrupt may be generated. The user should clear  
CCP1IE (PIE1<2>) before changing the capture mode  
to avoid false interrupts. Clear the interrupt flag bit,  
CCP1IE before setting CCP1IE.  
DS35008B-page 34  
Preliminary  
1999 Microchip Technology Inc.  
 复制成功!