PIC16C62B/72A
15.0 PACKAGING INFORMATION
15.1
Package Marking Information
28-Lead PDIP (Skinny DIP)
Example
MMMMMMMMMMMM
XXXXXXXXXXXXXXX
AABBCDE
PIC16C72A-04/SP
9917HAT
28-Lead CERDIP Windowed
Example
XXXXXXXXXXX
PIC16C72A/JW
9917CAT
XXXXXXXXXXX
XXXXXXXXXXX
AABBCDE
28-Lead SOIC
Example
MMMMMMMMMMMMMMMM
XXXXXXXXXXXXXXXXXXXX
PIC16C62B-20/SO
AABBCDE
9910/SAA
28-Lead SSOP
Example
XXXXXXXXXXXX
XXXXXXXXXXXX
PIC16C62B
20I/SS025
AABBCDE
9917SBP
Legend: MM...M Microchip part number information
XX...X Customer specific information*
AA
BB
C
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Facility code of the plant at which wafer is manufactured
O = Outside Vendor
C = 5” Line
S = 6” Line
H = 8” Line
D
E
Mask revision number
Assembly code of the plant or country of origin in which
part was assembled
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask
rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with
your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 105