PIC16C62B/72A
FIGURE 13-7: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
31
34
34
I/O Pins
Note: Refer to Figure 13-4 for load conditions.
FIGURE 13-8: BROWN-OUT RESET TIMING
BVDD
VDD
35
TABLE 13-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param Sym
No.
Characteristic
Min
Typ†
Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
—
—
µs VDD = 5V, -40°C to +125°C
ms VDD = 5V, -40°C to +125°C
31*
Twdt
Watchdog Timer Time-out Period
7
18
33
(No Prescaler)
32
Tost
Oscillator Start-up Timer Period
—
1024
—
—
TOSC = OSC1 period
TOSC
33*
34
Tpwrt Power-up Timer Period
28
—
72
—
132
2.1
ms VDD = 5V, -40°C to +125°C
µs
TIOZ
I/O Hi-impedance from MCLR
Low or WDT reset
35
TBOR
Brown-out Reset Pulse Width
100
—
—
µs
VDD ≤ BVDD (D005)
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
DS35008B-page 92
Preliminary
1998 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
