PIC12F629/675
FIGURE 12-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
31
34
34
I/O Pins
FIGURE 12-8:
BROWN-OUT DETECT TIMING AND CHARACTERISTICS
VDD
BVDD
(Device not in Brown-out Detect)
(Device in Brown-out Detect)
35
Reset (due to BOD)
(1)
72 ms time-out
Note 1: 72 ms delay only if PWRTE bit in Configuration Word is programmed to ‘0’.
2010 Microchip Technology Inc.
DS41190G-page 99